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UVM sequence 3 ways to start

2022-09-23 09:39:15Stepping on the pit record

start():

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  • sequence.strat(sequencer,parent_sequence,优先级) ,The first parameter is what needs to be mountedsequencer;第二个是parent_sequence,一般传入this或者不传入;第三个是优先级;第四个call_pre_post默认为1,则自动执行pre_body/ post_body()函数
  • start 执行 pre_start,body等函数.此时就完成了sequence的启动过程.
  • 所有sequence都要在sequencer中启动,当sequence启动的时候, 在sequence的 task start 内,会调用 set_item_context() 函数,在 set_item_context() 函数内,会调用 set_sequencer() 函数完成挂载,给m_sequencer赋值
  • set_sequencer 函数 会使m_sequencer The handle points to the current execution sequence 的 sequencer,即指向 env.vsqr
  • If not specified to mountsequencer,则挂载到parent_sequence的sequencer上

`uvm_do() 宏:

相比直接调用start函数,uvm_do()macro savessequenceThe instantiation and randomization steps

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uvm_do系列宏:

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第一类:uvm_do类

  • uvm_do:只有一个参数,即产生的transaction
  • uvm_do_pri(ority):除了第一个参数transaction外,还有一个参数priority优先级,sequencerbased on the arbitration mechanismtransactionpriority to select.Defaults to when no priority is specified-1,The specified value is greater than or equal to-1的整数,数字越大,优先级越高
  • uvm_do_with:第一个参数transaction,第二个参数constraints,Right when randomizingtransactionsome fields are constrained
  • uvm_do_pri_with:前两者的结合

第二类:uvm_do_on类

  • uvm_do_on:onmeans to show,is to explicitly specify the generated onetransaction具体是哪个sequencer来发送.它有两个参数,对应的就是transaction的指针和sequencer的指针.而对于uvm_do而言,它默认的sequencer就是调用uvm_domacro for thissequencespecified at startupsequencer

default_sequence:

test中将sequence通过config_db机制set到相应的sequencer(virtual sequencer)的main_phase中

在build_phase中将某个sequenceConfigured to a certainsequencerof dynamic operationphase中(如main_phase)的default_sequence, Then the simulation is executedmain_phase的时候,squencer的default_sequence就会启动

实际上default_sequence会调用start任务,有两种调用方式:

// 方式一

function void my_case0::build_phase(uvm_phase phase);
	super.build_phase(phase);
	`uvm_config_db#(ubm_object_wrapper)::set(this,  // 第一个参数是指定seqr的路径 
										 "env.in_agent.sqr.main_phase",  // The second parameter specifies what to executephase阶段
					  					 "default_sequence",  // The third parameter is what you specifyseq
										 sequence_base::type_id::get());  // uvm_config_db设置default_sequencer
endfunction
// 方式二

function void my_case0::build_phase(uvm_phase phase);
   case0_sequence cseq;                                              //
   super.build_phase(phase);
   cseq = new("cseq");                                               //
   uvm_config_db#(uvm_sequence_base)::set(this,                      //
                                         "env.i_agt.sqr.main_phase", //
                                         "default_sequence",         //
                                          cseq);                     //
endfunction

start_item/finish_itemWrapper functions as wellsequence,sequencer,driverThe handshake relationship is as shown below:

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